Servo loop for well bias voltage source

ABSTRACT

A servo loop for a charge pump including comparator. A variable resistor and comparator are in series and couple the output of the charge pump to an enable input. A current source/sink coupled to the variable resistor provide a first input voltage to the comparator, with the second input of the comparator being coupled to ground or V dd . A shunt circuit in parallel with the load at the output of the charge pump is also coupled to the output of the comparator. The charge pump and shunt are alternately enabled and disabled by the comparator to maintain a body-bias supply voltage. The servo loop may be configured to provide body-bias for NFETs or PFETs.

RELATED UNITED STATES PATENT APPLICATIONS

This Application is related to U.S. patent application Ser. No.10/747,016 by Tien-Min Chen, et al., on Dec. 23, 2003, entitled“Feedback Controlled Body-Bias Voltage Source”, and assigned to theassignee of the present invention.

This Application is related to U.S. patent application Ser. No.10/746,539 by Tien-Min Chen and Robert Fu, filed on Dec. 23, 2003,entitled “A Precise Control Component for a Substrate PotentialRegulation Circuit”, and assigned to the assignee of the presentinvention.

This Application is related to U.S. patent application Ser. No.10/747,022 by Tien-Min Chen, filed on Dec. 23, 2003, now U.S. Pat. No.7,012,461 entitled “A Charge Stabilizing Component for a SubstratePotential Regulation Circuit”, and assigned to the assignee of thepresent invention.

FIELD OF THE INVENTION

Embodiments of the present invention relate to circuits for providingoperational voltages in complementary metal-oxide semiconductor (CMOS)circuits. In particular, embodiments of the present invention relate tocontrol circuits for body-bias charge pumps.

BACKGROUND ART

As the operating voltages for CMOS transistor circuits have decreased,variations in the threshold voltages for the transistors have becomemore significant. Although low operating voltages offer the potentialfor reduced power consumption, threshold voltage variations due toprocess and environmental variables often prevent optimum efficiency andperformance from being achieved due to increased leakage currents.

Prior Art FIG. 1A shows a conventional CMOS inverter 100. A P-typesubstrate 105 supports an NFET 110 and a PFET 120. The NFET 110comprises a gate 112, source 113, and drain 114. The PFET 120 resides inan n-well 115, and comprises a gate 122, drain 123, and a source 124.The substrate 105 and source 113 are coupled by a tie 130 that isconnected to ground (GND), while source 124 and N-well 115 are coupledby a tie 135 that is connected to a supply voltage (V_(DD)). The inputto the inverter is applied to the gates 112 and 122, with the outputtaken from the drain contact 125. In this conventional configuration,the transistors are often treated as three terminal devices.

Threshold voltage variations may be compensated for by body-biasing.Body-biasing introduces a reverse bias potential between the bulk andthe source of the transistor that allows the threshold voltage of thetransistor to be adjusted electrically. The purpose of body-biasing isto compensate for 1) process variations; 2) temperature variations; 3)supply voltage variations; 4) changes in frequency of operation; and 5)changing levels of switching activity.

Prior Art FIG. 1B shows an inverter having connections for body-biasing.Body-bias can provided to the PFET 120 through a direct bias contact 150a, or by a buried n-well 140 using contact 150 b. Similarly, body-biasmay be provided to the NFET 110 by a surface contact 155 a, or by abackside contact 155 b. An aperture 145 may be provided in the buriedn-well 125 so that the bias potential reaches the NFET 110. In general,a PFET 120 or an NFET 110 may be biased by one of the alternativecontacts shown.

Depending upon the environmental and operational conditions, a CMOScircuit may require different levels of bias for the transistors. Forexample, a microprocessor that is executing a computationally intensiveroutine for a real-time application will typically be biased for maximumspeed, whereas during periods of low activity the bias will be adjustedto minimize leakage current.

For a CMOS integrated circuit, the load presented to a circuit providinga body-bias voltage and the bias circuit itself may vary with theenvironmental and operational conditions of integrated circuit. Thus,the variations in the required body-bias voltage and the load to whichit is applied should be taken into account to achieve optimumperformance.

Charge pumps are frequently used in integrated circuits to provide avoltage that is larger than the voltage supplied to the integratedcircuit. For example, charge pumps are used in certain types ofnon-volatile memory to provide operating voltages. These operatingvoltages are typically not subject to the close tolerances that apply tobody-bias voltages for threshold voltage adjustment.

SUMMARY OF INVENTION

Thus, a need exists for a system for controlling a charge pump toprovide a precise body-bias voltage for transistors in CMOS circuits.

Accordingly, embodiments of the present invention provides a system thatuses a servo loop to control a charge pump to produce a desiredbody-bias voltage. The system accept an input reference voltage that isrelated to the desired output and can be configured for either NFETs orPFETs.

In an embodiment of the present invention for providing a body-bias forNFETs, the output of a negative charge pump is coupled to a currentsource by a variable resistor. A first input terminal of a comparator iscoupled to the node between the resistor and the current source, and asecond input is connected to ground. The output of the comparator iscoupled to enable an input of the charge pump, and an enable input of ashunt circuit that is in parallel with a load on the output of thecharge pump.

In an embodiment of the present invention for providing a body-bias forPFETs, the output of a positive charge pump is coupled to a current sinkat ground by a variable resistor. A first input terminal of a comparatoris coupled to a power supply V_(dd) as a reference, and a second inputis coupled to the node between the resistor and the current source. Theoutput of the comparator is coupled to enable an input of the chargepump, and an enable input of a shunt circuit that is in parallel with aload on the output of the charge pump.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are incorporated in and form a part ofthis specification, illustrate embodiments of the invention and,together with the description, serve to explain the principles of theinvention:

Prior Art FIG. 1A shows a conventional CMOS inverter without body-biasconnections.

Prior Art FIG. 1B shows a conventional CMOS inverter with body-biasconnections.

FIG. 2 shows a block diagram of a feedback controlled body-bias circuitin accordance with an embodiment of the present claimed invention.

FIG. 3 shows a circuit diagram of a negative body-bias supply with aservo loop for NFETs in accordance with an embodiment of the presentclaimed invention.

FIG. 4 shows a circuit diagram of a positive body-bias supply with aservo loop for PFETs in accordance with an embodiment of the presentclaimed invention.

FIG. 5A shows a circuit diagram of a servo loop with a negativebody-bias supply applied to an NFET in accordance with an embodiment ofthe present claimed invention.

FIG. 5B shows a circuit diagram of a servo loop with a positivebody-bias supply applied to a PFET in accordance with an embodiment ofthe present claimed invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the following detailed description of the present invention, afeedback-controlled body-bias circuit, numerous specific details are setforth in order to provide a thorough understanding of the presentinvention. However, it will be obvious to one skilled in the art thatthe present invention may be practiced without these specific details.In other instances well known methods, procedures, components, andcircuit elements have not been described in detail as not tounnecessarily obscure aspects of the present invention.

FIG. 2 shows a block diagram 200 of an embodiment of the presentinvention. A charge pump 210 has an output coupled to C_(load) thatrepresents a substrate or well. Since body-bias is typically applied asa reverse bias to a p-n junction within a CMOS device, the load seen bythe body-bias voltage source is generally a capacitive load; however,there is a certain amount of leakage current, represented by R_(leak).

An output monitor 205 has a sense input coupled to the output of thecharge pump 210. The output of the charge pump is compared to areference voltage V_(ref) by the output monitor 205. upon sensing apositive or negative deviation (overvoltage or undervoltage) thatexceeds an allowed value, the output monitor provides a control signalto the charge pump circuit 210 and/or a shunt circuit 215.

For an overvoltage condition with loads having a large C_(load) andlarge R_(leak) (small leakage current), simply turning off the chargepump may not result in a sufficiently fast discharge of C_(load) to thedesired value. Accordingly, the shunt 215 may be enabled to provide adischarge path that allows faster correction of the output voltageV_(out). FIG. 2 is described in previously incorporated copending patentapplication entitled “Feedback Controlled Body-Bias Voltage Source.”

FIG. 3 shows a circuit diagram 300 of a negative body-bias supply with aservo loop for NFETs in accordance with an embodiment of the presentinvention. The current source 305 is coupled to the output of thenegative charge pump circuit 315 by a variable resistor R. An equivalentload circuit is shown having an R_(leak) in parallel with a C_(load).The negative charge pump circuit 315 and shunt 320 have enable inputscoupled to the output of comparator 310.

The variable resistor R, Shunt 320, comparator 310 and current source305 are elements of the servo loop that controls the voltage V_(pw) atthe output of the charge pump 315. The basic servo loop feedback isprovided by the comparator. V_(pw) is equal to −IR with respect to thevirtual ground at the (+) input of the comparator 310. In a particularembodiment, I is preferably about 10 microamperes.

The magnitude of the voltage drop IR may be adjusted by adjusting thevariable resistor R. A description of the variable resistor R shown inFIG. 3 and FIG. 4 is provided in the previously incorporated copendingpatent application entitled “A Precise Control Component for a SubstratePotential Regulation Circuit.”

When the virtual ground potential at the (+) input is above thereference ground potential at the (−) input of the comparator 310, thecomparator output is high, enabling the negative charge pump 315 anddisabling the shunt 320. With the charge pump on, V_(pw) is forcedlower.

In order to lower V_(pw), the charge pump 315 must be able to sink acurrent that is greater than the output of the current source 305. Forsufficiently large values of R_(leak), V_(pw) may tend to rise due tocharging of C_(load) by the current source 305 when the charge pump 315is off.

Due to the action of the charge pump 315, the virtual ground potentialwill drop until the virtual ground potential is slightly below thereference ground potential. At this point the comparator output isswitched low and the charge pump 315 is disabled and the shunt isenabled. The enabling of the shunt reduces the voltage across C_(load).

Although the potential across C_(load) will tend to drop when the chargepump is turned off due to the presence of R_(leak), The shunt provides afaster forced response. The servo loop produces a cycling behavior tomaintain V_(pw) at −IR, in which the charge pump and shunt arealternately enabled and disabled.

In one embodiment, the comparator 310 may be designed with a hysteresischaracteristic to provide a deadband in which neither the charge pump orshunt are enabled. Alternatively, the shunt 320 may be designed with adelay at the enable input.

In one embodiment, the current source 305 sources a current of about 10microamperes and the shunt 320 and charge pump 315 are cycled at afrequency of about 40 MHz when coupled to a C_(load) of less than 100nanofarads (e.g., about 75 nanofarads).

FIG. 4 shows a circuit diagram 400 of a positive body-bias supply with aservo loop for PFETs in accordance with an embodiment of the presentinvention. A current sink 405 is coupled to the output of the negativecharge pump circuit 415 by a variable resistor R. An equivalent loadcircuit is shown having an R_(leak) in parallel with a C_(load). Thenegative charge pump circuit 415 and shunt 420 have enable inputscoupled to the output of comparator 310.

The variable resistor R, Shunt 420, comparator 410 and current sink(negative source) 405 are the elements making up the servo loop thatcontrols the voltage V_(nw) at the output of the charge pump 415. Vnw isequal to V_(dd)+IR with respect to ground. In a particular embodiment, Iis preferably about 10 microamperes.

The comparator 410 has V_(supply) that limits the available range ofV_(dd). For example, if V_(supply) is equal to about 2.5 volts, theavailable range of V_(dd) is about 0.6 volts to 1.6 volts. In order tomaximize the common mode input range of comparator 410 it is preferableto use a comparator that employs both PFETs and NFETs in its inputstage.

When the virtual V_(dd) potential at the (−) input is below thereference V_(dd) potential at the (+) input of the comparator 410, thecomparator output is high, enabling the positive charge pump 415 anddisabling the shunt 420. With the charge pump on, V_(nw) is forcedhigher.

Due to the action of the charge pump 415, V_(nw) will rise until thevirtual V_(dd) potential is slightly above the reference V_(dd)potential. At this point the comparator output is switched low and thecharge pump 415 is disabled and the shunt is enabled. The enabling ofthe shunt reduces the voltage across C_(load).

Although the potential across C_(load) will tend to drop when the chargepump is turned off due to the presence of R_(leak), The shunt provides afaster forced response. The servo loop produces a cycling behavior tomaintain V_(nw) at V_(dd)+IR, in which the charge pump and shunt arealternately enabled and disabled.

In one embodiment, the comparator 410 may be designed with a hysteresischaracteristic to provide a deadband in which neither the charge pump orshunt are enabled. Alternatively, the shunt 420 may be designed with adelay at the enable input.

Descriptions of the variable resistor R and shunt (320, 420) shown inFIG. 3 and FIG. 4 are provided in the previously incorporated copendingpatent applications entitled “A Precise Control Component for aSubstrate Potential Regulation Circuit” and “A Charge StabilizingComponent for a Substrate Potential Regulation Circuit.”

FIG. 5A shows a circuit diagram of a servo loop with a negativebody-bias supply used to reverse-bias a p-n junction in a CMOS device inaccordance with an embodiment of the present claimed invention.

FIG. 5B shows a circuit diagram of a servo loop with a positivebody-bias supply used to reverse-bias a p-n junction in a CMOS device inaccordance with an embodiment of the present claimed invention.

The foregoing descriptions of specific embodiments of the presentinvention have been presented for purposes of illustration anddescription. They are not intended to be exhaustive or to limit theinvention to the precise forms disclosed, and obviously manymodifications and variations are possible in light of the aboveteaching. For example, an integrated circuit having a P-type substrateand an N-well disposed therein is described. More generally, theinvention may be used with a semiconductor substrate of either N-type orP-type having a complementary well disposed therein. The embodimentswere chosen and described in order to best explain the principles of theinvention and its practical application, to thereby enable othersskilled in the art to best utilize the invention and various embodimentswith various modifications are suited to the particular usecontemplated. It is intended that the scope of the invention be definedby the Claims appended hereto and their equivalents.

1. A servo loop for controlling a charge pump body-bias voltage sourcein an integrated circuit comprising: a comparator comprising a firstinput and a comparator output coupled to an enable input of a chargepump, wherein said comparator comprises a hysteresis characteristic; areference voltage coupled to a second input of said comparator; aresistor coupled between said first input of said comparator and anoutput of said charge pump, wherein said resistor comprises a variableresistor; and a shunt circuit comprising an enable input coupled to saidcomparator output, wherein said output of said charge pump is coupled tosaid shunt circuit.
 2. The servo loop of claim 1, further comprising acurrent source.
 3. The servo loop of claim 2, wherein said currentsource and said first input are coupled to said output of said chargepump by said resistor.
 4. The servo loop of claim 1, wherein said shuntcircuit comprises an enable input delay.
 5. The servo loop of claim 1,wherein said comparator comprises both NFETs and PFETs in an inputstage.
 6. The servo loop of claim 1, wherein the output of said chargepump is coupled to a complementary well.